A flash memory device, such as those used in mobile terminals, usually has multiple partitions. These partitions may be binary partitions (read only) and read-write partitions. During write operations, data cannot be read from the memory until the write operation is completed. This causes read latency which might not be desirable or acceptable for real time applications. In any application, overall system performance will be faster if data can be read from read-only partitions while write operations are in process;
One example of an application where read latency is critical is the paging-on-demand-technique, where pages of data are not copied from a data storage to RAM until they are needed. Memory is organized in so-called blocks and pages, with one page typically consisting of 512 bytes. A block combines several pages and usually has a size of 16 kB. To reduce the required memory size, only pages which are currently needed for an application are loaded. Therefore, demand paging requires continuous read and write processes. In NAND flash memory systems, paging-on-demand is commonly applied, but a major drawback of systems for this technique is that read and write operations cannot be performed simultaneously. Each page retrieval operation will block the whole system until the page is fully loaded, which slows application execution down considerably.
While NOR flash does support read-while-write techniques, NOR type memory is in general not used in memory cards for several reasons. Due to the parallel architecture of NOR memory, it shows lower write and erase performance compared to NAND and is therefore mainly used as read-only memory for e.g. program code. Additionally, NOR devices take up more space on a die per stored amount of data than NAND devices, so that NAND flash is preferred for storing large amounts of data within restricted space, such as in mobile devices.
Any of the described features and problems are present in both memory cards and embedded mass storage devices based on flash memory. Therefore, a need exists to provide a method of controlling read processes on NAND flash memory cards and embedded mass storage devices in order to decrease read latency times. This may be achieved by an additional set of commands and/or registers to handle read and write operations. The new set of commands and/or registers may be regarded as a second “virtual” port of the memory controller of a flash device that allows fast read access to the memory device even if another write operation is in process.